Coils against for Parasitic Capacitances in LSI Package Substrate

Abstract

In this paper, it is shown that degradation of transmission characteristics in flip-chip BGA package in consequence of parasitic capacitance nearby balls and vias can be improved by inserting coils. In the case of an analysis example for a package substrate with six layers (two build-up layers, two core layers and two build-up layers), insertion loss is under 1 dB from DC to 15 GHz. This Upper frequency is equal to Nyquist Frequency of 30 Gbps serial signal or 3 times of Nyquist Frequency of 10 Gbps serial signal.