液晶討論会講演予稿集
Online ISSN : 2432-9959
Print ISSN : 1880-3539
ISSN-L : 1880-3539
第22回 液晶討論会
セッションID: 2B11
会議情報

アナログ階調表示強誘電性液晶 : ヒステリシスに及ぼすパラメータの検討
*松居 恵理子片岡 延江岩村 貴高梨 英彦安田 章夫遠藤 宏昭村山 裕
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会議録・要旨集 フリー

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抄録
We have found a new analog gray-scale technique for ferroelectric liquid crystal (FLC) displays 1). The new technique involves the micro-domain texture, and the addition of nanometer-scale particles into the FLC mixture enables a wide distribution of threshold voltages within one pixel. This threshold-voltage broadening was found to be caused by an increase in the distribution of the smectic-layer tilt angles 3). The hysteresis in the voltage-transmittance curve is one of the crucial problems for realizing analog gray-scale displays. We report that the causes of the hysteresis are the relaxation of the polarization in the alignment layers brought about by the spontaneous polarization and the instability of the memory effect. In order to accelerate the depolarization in the alignment layers, we have increased the conductivity and controlled frame rates to clarify the relationship between the memory stability and the hysteresis.
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© 1996 一般社団法人日本液晶学会
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