IEEJ Transactions on Electronics, Information and Systems
Online ISSN : 1348-8155
Print ISSN : 0385-4221
ISSN-L : 0385-4221
<Electrical and Electronic Circuit, LSI>
An Analysis of False Turn-On Mechanism on Semiconductor Devices
Akihiro NishigakiHirokatsu UmegamiTaichi MishimaFumiya HattoriMasayoshi Yamamoto
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2015 Volume 135 Issue 7 Pages 769-775

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Abstract
This paper analyzes the gate noise performance using simulation and experimental test focused on parasitic inductances of power semiconductor devices' terminals. The gate noise which is over the threshold voltage makes non-active FETs turn on and leads the FETs to a breakdown. Next generation devices which have very high speed switching characteristic are difficult to be dealt with due to the false turn-on problem. The false turn-on mechanism in conventional theory is related to parasitic capacitors and a gate resistor and false turn-on occurs by the current flowing through a reverse transfer capacitor. However, the novel mechanism we proposed is mainly linked to parasitic inductors and recovery current and a non-active FET is switched on due to the oscillation which the energy charged by the current flowing from the source to the gate makes. We verified our theory by experiments, simulations and simplistic circuit equations.
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© 2015 by the Institute of Electrical Engineers of Japan
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