Abstract
We propose a new method based on competitive learning for the placement in VLSI layout design. In the placement problem which is one of combinatorial optimization problems, cells having various kinds of shapes or sizes are to be compactly placed to minimize the routing length of signal nets. It is difficult both to construct a cost function and to determine values of parameters contained in it.
Recently applications of Hopfield networks to combinatorial optimization problems have been reported. For such cases, however, the cost function is requisite. Using learning schemes will make it possible to avoid the necessity of the cost function.
Competitive learning is one of learning paradigms without teacher in the framework of neural networks. It has an ability to provide a way to discover the salient features which can be used to classify a set of patterns.
By corresponding net data to input patterns skillfully, it is possible to minimize wirings and area without any cost function because they can be evaluated during a learning process automatically. Numerical experiments show that the proposed method can produce the optimal placement with a relatively small amount of computational time.
