電気学会論文誌D(産業応用部門誌)
Online ISSN : 1348-8163
Print ISSN : 0913-6339
ISSN-L : 0913-6339
論文
パワーエレクトロニクスシステムの並列化シミュレーションにおける自動回路分割法
加藤 利次井上 馨小川 拓海高見 悠基
著者情報
ジャーナル フリー

2015 年 135 巻 10 号 p. 1025-1032

詳細
抄録

Computational efficiency is very important for reducing the system development time and cost of a power electronic (PE) system simulator. A PE system often consists of various subcircuits that convert electric energy between different combinations of AC and DC. The subcircuits are linked by DC voltages and currents with large energy storage elements of inductors and/or capacitors in most cases. The DC-link voltages and currents vary very slowly. This paper describes a parallel circuit simulation method that divides the whole system into subcircuits by applying an explicit integration formula to selected energy storage elements such as series inductors and/or parallel capacitors. A new automatic partitioning method of a system into subcircuits is proposed. The method mainly consists of three steps: detection of parallel capacitors, that of series inductors, and reconnection consideration by control circuits. The proposed method is applicable to power electronic systems. A parallel simulation was performed to investigate how the proposed method works and to demonstrate the effectiveness of circuit partitioning.

著者関連情報
© 2015 電気学会
前の記事 次の記事
feedback
Top