抄録
Recently, a multilevel inverter has been applied as the DC/AC converter of the UPS and PCS. A harmonic reduction, size reduction, and higher efficiency are the advantages of a multilevel inverter. In this study, we focus on the ratio of the input voltage of the single-phase NPC inverter. It is possible to output a voltage if this ratio is the same as that in the 5-level mode or if this ratio is different from that in the 7-level mode. However, the areas that output 0V during the dead time period deteriorate the quality of the generated current waveform in the 7-level mode. We propose the insertion of a new dead time (PDL: Partial Dead-time Less) that is suitable for the 7-level mode to solve this problem. In this paper, we demonstrate the validity of the PDL with an experiment.
