Effects of Source and Drain Impurity Profile on Breakdown Voltage of High-Performance Si TFTs

抄録

The effects of the source and drain junction depth on breakdown voltage of high-performance Si TFTs have been studied. It is found that decreasing the junction depth results in a substantial increase in the source-drain breakdown voltage (V_BD). The improvement in V_BD is primarily due to suppression of parasitic bipolar gain. Reduced parasitic bipolar gain originates from the suppression of the body potential elevation in the shallow junction structure, that allows for penetration of the excess holes beneath the source n+ region.