Information and Media Technologies
Online ISSN : 1881-0896
ISSN-L : 1881-0896
Hardware and Devices
Delay Testing: Improving Test Quality and Avoiding Over-testing
Seiji KajiharaSatoshi OhtakeTomokazu Yoneda
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ジャーナル フリー

2011 年 6 巻 4 号 p. 1053-1066

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抄録
Delay testing is one of key processes in production test to ensure high quality and high reliability for logic circuits. Test escape missing defective chips can be reduced by introducing delay testing. On the other hand, we need to concern yield loss caused by delay testing, i.e., over-testing. Many methods and techniques have been developed to solve problems on delay testing. In this paper, we introduce fundamental techniques of delay testing and survey recent problems and solutions. Especially we focus on techniques to enhance test quality, to avoid over-testing, and to make test design efficient by treating circuits described at register transfer level.
著者関連情報
© 2011 Information Processing Society of Japan
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