A CMOS-compatible Non-volatile Memory Element using Fishbone-in-cage Capacitor

抄録

This paper proposes a new non-volatile memory element that can be fabricated with a standard CMOS process and programmed and erased without a large current consumption. This paper also proposes a characteristics measurement circuit for the proposed memory element. Recently, self-powered sensor chips using on-chip solar cells as micro energy harvesters have been studied. For such sensor chips, however, non-volatile memory is indispensable to retain the data during nighttime. We propose a new memory element that consists of a Fishbone-in-Cage Capacitor (FiCC) and an NMOS to realize the double-gate structure of flash memory without using dedicated fabrication processes. We also develop a circuit for measuring the threshold voltage (V_T) of the memory element to clarify the feasibility of using FN tunneling for programming and erasing operations to reduce the supply current. From measurement results, we show that V_T shifts to 4.5V by applying a 5V programming voltage for 5sec, and the V_T shift remains observable for approximately 13days. It is also seen that only a slight degradation appears after 25,000 program-erase cycles. We also investigated a non-volatile memory array architecture with bit cells, each of which consists of a pair of proposed memory elements. By writing the memory element pair complementarily, and reading with a differential amplifier, a small difference in V_Ts can be sensed.