A Report on TMRC'97
Pages 39-43
Details
Pages 39-43
The circuit designs of EPR4ML channel LSIs were presented in the TMRC'97. Furthermore, several techniques for the next generation of the EPRML were discussed. A candidate is MTR (Maximum Transision Run) trellis coding using with EEPR4 equalization. There were five papers related on MTR coding which offers a code rate of 8/9 and an SNR improvemnet of 1.7dB, comparing with the 16/17+EPR system. From a standpoint of reducing hardware complexity, SSD (Signal Space Detection), M-DFE and Dual-DFE have attracted the attendances.
