A High Speed Viterbi Decoder Using Path Limited PRML Method and its application to 1/2 inch HD full bit rate digital VCR

Abstract

We developed a high speed Viterbi Decoder LSI using our original algorithm, called "Path limited PRML Method". The reproduced signal is equalized to the PR1 characteristic and pre-detected by a 2-level bit-by-bit detector. Then the number of state transition paths is limited to four, and we can realize Viterbi Decoder for EEPR4ML with only 2-state. Moreover, in ACS loop, we are allowed to calculate in two cycle time. So we can realize a decoder with about two times faster speed. Furthermore, this LSI has been used to realize an experimental 1/2"DVCR at 1.3Gbps.