ITE Technical Report
Online ISSN : 2424-1970
Print ISSN : 1342-6893
ISSN-L : 1342-6893
33.39
Session ID : IST2009-78
Conference information
A 58-μW Single-Chip Sensor Node Processor Using Synchronous MAC Protocol
Shintaro IzumiTakashi TakeuchiTakashi MatsudaHyeokjong LeeToshihiro KonishiKoh TsurudaYasuharu SakaiHiroshi KawaguchiChikara OhtaMasahiko Yoshimoto
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Abstract
In this paper, we propose a single-chip ultra low-power sensor node processor with a synchronous media access control (MAC). It is comprised of a transceiver, i8051 micro processor, and dedicated MAC processor. The test chip occupies 3x3mm^2 in a 180-nm CMOS process, including 1.38M transistors. The power is 58.0μW under a network environment.
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© 2009 The Institute of Image Information and Television Engineers
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