Abstract
We fabricated a 33-Megapixel and 120-fps CMOS image sensor with 14-bit analog-to-digital converters (ADCs) using depletion-mode MOS (DMOS) capacitors. The DMOS capacitor has high capacitance density, whereas its capacitance depends on input voltage. Hence it has been not thought to be suitable for ADCs. We used two-stage cyclic ADC architecture with a split-sampling-capacitor method to reduce the differential non-linearity (DNL) of ADC. As a result, the fabricated image sensor exhibited a DNL of +0.95/-0.80 LSB, realizing genuine 14-bit resolution. Meanwhile, this image sensor exhibited a sensitivity of 3.57 V/lx-s by hiring nanofabricated 90 nm manufacturing process in analog circuit.
