適応ゲイン型カラムADCと積層構造を用いた830万画素480fpsグローバルシャッタCMOSイメージセンサ

加藤 祐理; 大池 祐輔; 秋山 健太郎; ルォンフォン; 新妻 渉; 加藤 昭彦; 佐藤 守; 中村 渉; 城下 寛司; 坂野 頼人; 北野 良昭; 中村 卓矢; 遠山 隆之; 岩元 勇人; 江崎 孝之

doi:10.11485/itetr.40.32.0_7

40.32 Information Sensing Technologies(IST)

Session ID : IST2016-43

DOI https://doi.org/10.11485/itetr.40.32.0_7

Conference information

Host: Information Sensing Technologies(IST)

Name : Information Sensing Technologies(IST)

Date : September 26, 2016

An 8.3M-pixel 480fps Global-Shutter CMOS Image Sensor with Gain-Adaptive Column ADCs and 2-on-1 Stacked Device Structure

*Yuri Kato, Yusuke Oike, Kentaro Akiyama, Luong D. Hung, Wataru Niitsuma, Akihiko Kato, Mamoru Sato, Wataru Nakamura, Hiroshi Shiroshita, Yorito Sakano, Yoshiaki Kitano, Takuya Nakamura, Takayuki Toyama, Hayato Iwamoto, Takayuki Ezaki

Author information

Keywords: CMOS Image Sensor, Gain-Adaptive Column ADC, Stacked Device, SS-ADC

CONFERENCE PROCEEDINGS FREE ACCESS

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Abstract

A 4K2K 480 fps global-shutter CMOS image sensor has been developed with super 35 mm format. This sensor employs newly developed gain-adaptive column ADCs to attain a dark random noise of 140 µVrms for the full-scale readout of 923 mV. An on-chip online correction of the error between two switchable gains maintains the nonlinearity of output image within 0.18 %. The 16-channel output interfaces with 4.752 Gbps/ch are implemented in 2 diced logic chips stacked on a sensor chip with 38K micro bumps.

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