Transactions of the Japan Society for Industrial and Applied Mathematics
Online ISSN : 2424-0982
ISSN-L : 0917-2246
On the Round-off Error Estimation Using IEEE754 Floating-Point Arithmetic
Tomonori KouyaHideko Nagasaka
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1997 Volume 7 Issue 1 Pages 79-89

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Abstract
We propose the round-off error estimation using IEEE754 floating-point arithmetic which widely used on various workstations and personal computers. Interval Analysis is one of the standard methods in order to estimatite round-off errors in numerical processes, but it is not more convenient for a lot of users. In this paper, we explain the proposed estimation and show the source programs which can run on SparcStaion, PC-9801 and IBM PC/AT compatible. Finally, numerical experiments demonstrate the effectiveness of the proposed estimation.
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© 1997 The Japan Society for Industrial and Applied Mathematics
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