外部電場付加によるレジスト塗布膜厚制御へ向けた外部電極形状の検討

抄録

In recent years, as semiconductor products have been reduced in size and advanced in function, they are approaching the limit of ultrafine processing in the semiconductor surface, and it is inevitable that two-dimensional expansion of the substrate. In order to solve the problem, I focused on a three-dimensional structure that can achieve compactness and high density. Through Silicon Via (TSV) is a typical example of a three-dimensional structure, and in the resist film formation which is one of the steps of forming it, It is necessary to uniformly apply the resist to the edge portion, the wall portion, and the bottom portion of the prepared hole of the through hole called a via hole. However, this process has not yet been realized. In this paper, we attempt to control the resist coating thickness by combining an electrostatic induction type spray with an external electric field. The result of examining the shape of the external electrode for controlling its film thickness is reported.