Recently, an advanced chip size packaging technology is important for developing portable electronic devices. Chip size package (CSP) is composed of metal, IC, and the polymeric material. Thermal fatigue occurs often due to the difference of thermal properties between a substrate and a chip. Thermal and mechanical loads cause the warpage of CSP. In this study, a simple theory on the bases of a multi-layer plate theory considering a viscoelastic property in substrate and resin sheet is presented. The thermo-viscoelastic analysis for the deflection of CSP is performed. The amount of warpage is predicted when temperature cooled down from 453K of the bonding temperature to 298K in the room temperature. Finally, the results of this study are compared with experimental results.