1102 Effect of Local Residual Stress in Three-Dimensionally Stacked LSI Chips on Electronic Characteristics of Semiconductor Devices

Abstract

Effect of residual stress in a silicon chip stacked three-dimensionally for high performance applications on the electronic characteristics of transistors formed in the chip was analyzed by using a finite element method. A periodic distribution appeared in each stacked chip due to the periodic small bump alignment. Since the electronic band structure of silicon distorted by strain, it was found that the electronic performance of NMOS transistors changed by about 10%/100-MPa. Therefore, it is very important to optimize the structure design of each product.