In flip-chip structures, the difference in material properties such as Young's modulus and the coefficient of thermal expansion among a metallic bump, underfill, a silicon chip and a substrate causes the local distribution of residual stress on the chip surface. This stress distribution may cause serious degradation of electronic devices. In this study, we have developed piezoresistive strain sensor chips that consist of single-crystalline silicon for the measurement of residual stress in 3-D stacked structures. The local distribution of residual stress in a two-chip stacked structure was measured by the sensor chips. As a result, the amplitude of the distribution of the residual stress in an upper chip was almost constant of about 200 MPa regardless of the bottom bump alignment. When the two chips were stacked by same bump alignment, the amplitude in the bottom chip decreased to about one third.
