抄録
The crack generation of Si and the yielding of TSV(Through Silicon Via) in 3D System in Package will be concerned in the cases of reflow process. In this study, we discussed on the thermal stresses of Si and TSV in 3D SiP under the reflow process of electronics devices. ADVENTURECluster which is parallel computing simulator based on finite element method is adopted to simulate thermal stresses. The stresses of the TSV were higher than yielding stress of copper. Maximum principal stress of edge part of Si was estimated to be around 500MPa. This stress was close to the bending strength of silicon and edge part of silicon was singular stress field.
