Journal of Signal Processing
Online ISSN : 1880-1013
Print ISSN : 1342-6230
ISSN-L : 1342-6230
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GA Processor Architecture for Real-Time GA Processing and VLSI Implementation for High-Speed PE
Tetsuya ImaiMasaya YoshikawaHidekazu TeraiTomohiro FujitaHironori Yamauchi
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2004 Volume 8 Issue 4 Pages 323-334

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Abstract
Genetic Algorithm (GA), which is widely known as a general-purpose optimization method based on genetic evolution, has essential difficulties in its huge computation time and premature convergence. In order to overcome these difficulties and to search a new application, we propose a dedicated processor architecture, which can provide high-speed and high-expandable GA processing using VLSI multi-processor approach based on Distributed GA. A VLSI implementation of a processor element (PE), which is characterized by parallel evolutionary pipelines and adaptive genetic operations, indicates that the PE can be 130 times faster than conventional software processing. Furthermore, the parallel computer simulation demonstrates that the GA processor, with a newly proposed hierarchical ring topology, can provide a scalable performance according to PE numbers and a potential capability for real-time GA processing.
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© 2004 Research Institute of Signal Processing, Japan
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