スマートプロセス学会誌
Online ISSN : 2187-1337
Print ISSN : 2186-702X
ISSN-L : 2186-702X
有機絶縁膜を用いたはんだ充填シリコン貫通ビア
堀部 晃啓末岡 邦昭青木 豊広小原 さゆり森 裕幸折井 靖光
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2016 年 5 巻 4 号 p. 239-243

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We have developed a new wafer stacking technology with solder-base through silicon vias fabricated by ViaS (vertical integration after stacking) process. The technology will provide a low cost solution of 3D integration which can fit to high volume and cost sensitive products such as IoT applications. The structure consists of organic insulator by vapor deposition polymerization and solder as conductor formed by molten solder filling technique. In this paper, we report the process flow, key technologies, a demonstration result, mechanical modeling, and analysis results of the interface interaction between the polymer insulator and the solder via metal.
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© 2016 一般社団法人 スマートプロセス学会
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