1995 Volume 36 Issue 5 Pages 670-675
W film deposition by switching bias sputtering, which features alternating operation of standard and bias sputtering, was investigated to develop a process which better fits the requirements of ultra very large scale integration circuits applications. Step coverage is improved above 50% for the holes with 0.3 μm diameter and 1 μm depth by adopting most suitable conditions in this sputtering. The bias time ratio in this method is found to be a dominant factor to raise the step coverage. The quality of W films deposited by this method is the same level as that of deposited by conventional DC sputtering. It is found that the method does not produce damages during deposition but gives low contact resistances to n+ and p+ type Si. The W metallization using this method is considered to be quite promising for submicron LSIs.
