[Paper] A 1-inch Optical Format, 80fps, 10.8Mpixel CMOS Image Sensor Operating in a Pixel-to-ADC Pipelined Mode

抄録

A 1-inch optical format, 80fps, 10.8M-pixel CMOS image sensor that employs a row-shared dual conversion gain pixel for both high-end video and still camera applications is presented. The 80fps readout speed was chosen because of a minimum requirement for a strobe sync speed of 1/60s for use in a still camera without a mechanical shutter and also for reducing rolling shutter distortion on moving objects. In order to satisfy this frame rate requirement with a minimum increase in analog power consumption, a new pipelined pixel-to-ADC scheme was introduced. A noise floor of 1.6 e^-_rms and the column fixed pattern noise (FPN) of 0.045 e^-_rms have been obtained at the highest gain of 27 dB, while the maximum handling signal charge is 25 ke^- at the lowest gain, suggesting sufficient settling of pixel and column analog signals within a row time of 4.58μs due to the newly introduced pipelined operation.