Implementation of A/D converter with window using field programmable analog array

抄録

This paper presents the implementation of an analog-to-digital (A/D) converter (ADC) with a window using a field programmable analog array (FPAA). This ADC exhibits superstable behavior that corresponds to the digital output sequence and realizes rate encoding A/D conversion. To implement the ADC using an FPAA, a scaling adjustment for the mathematical model that describes the dynamics is performed. A hardware experiment confirms that the dynamics of the ADC are realized by the circuit implementation of the FPAA. The dynamics of the ADC in the circuit implementation with the analog input as an external input are confirmed.