Proceedings of JSPE Semestrial Meeting
2006 JSPE Autumn Meeting
Session ID : C32
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Variance Analysis for Overlay Errors in Semiconductor Lithography Equipment
*Youzou FukagawaRyuhei MiyashiroMario Nakamori
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Abstract
In semiconductor lithography equipment, overlay errors are caused by various factors such as poor adjustment of the equipment, wafer deformation through the process, and environmental unstability of atmospheric pressure and temperature.
To explore key factors of overlay errors, this paper proposes a method of performing detailed analysis of overlay error variance.
In addition, new analysis method is explained, and an actual example of the analysis is shown.
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© 2006 The Japan Society for Precision Engineering
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