Transactions of the Society of Instrument and Control Engineers
Online ISSN : 1883-8189
Print ISSN : 0453-4654
ISSN-L : 0453-4654
High Speed Reference Bit Pattern Generation with Multi-Processor Parallel Processing
Ikuo KAWAGUCHIKazuo YAMAGUCHIKozo NAKAHATA
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1988 Volume 24 Issue 9 Pages 967-972

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Abstract
This paper describes a high speed reference bit pattern generation method for pattern inspection by comparing LSI reticle patterns with their design data.
A multi-processor parallel processing bit pattern generator has been developed, which is able to convert the design data composed of angles against the scanning direction of linear sensing device (CCD), the corner point addresses of a rectangular pattern which is an element of a circuit pattern, and the others, into the bit pattern at high speed.
The features of the generator are as follows:
(1) A multi-processor system with a pipeline processing of data transfer to pattern conversion is designed to generate such number of patterns as is proportional to the number of processors without any compromise of the generation speed.
(2) A FIFO data renewal control equipped with 5 pointers can receive and renew the design data without referring to the processor.
(3) Its microprogram control can diversify pattern shapes and accept any design data format.
Thus, when the scanning speed of the linear CCD with 1, 024 cells is 10MHz, the maximum number of patterns to be generated is 200per line with 16 processors in use.
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© The Society of Instrument and Control Engineers (SICE)
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