時間領域フーリエ補間による非同期サンプリング・レー卜・コンパータ
2007 年 43 巻 2 号 p. 145-152
詳細
2007 年 43 巻 2 号 p. 145-152
A time-domain SRC, sampling rate converter, using Fourier interpolation to achieve less gate count than in frequency domain is proposed. The new SRC is implemented in 1/150 of the circuit size of conventional SRC with moderate performance using filters. It can also be used as back-end for filter-type SRC to achieve high performance efficiently.
