Transactions of the Materials Research Society of Japan
Online ISSN : 2188-1650
Print ISSN : 1382-3469
ISSN-L : 1382-3469
Computer Simulation and Lattice Defects
MD Simulation of Defect Generation during Annealing Process of Copper Wiring
Tomoaki AkabaneYasushi SasajimaJin Onuki
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Keywords: simulation, MD, LSI, wire, defect
JOURNAL FREE ACCESS

2008 Volume 33 Issue 2 Pages 241-244

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Abstract
In the production of LSI, annealing process is necessary to coarsen the crystal grains in the wire. In this process, the wiring breakdown is frequently caused by the defect generation in the bottom of the buried wire. To overcome this difficulty, we investigated the conditions for the defect generation and the atomic behavior during the annealing process by the molecular dynamics simulation. Three rigid plates are placed as the two sidewalls and the bottom of the wire with a rectangular parallelepiped shape. A single crystalline copper is placed as the material of the wiring and the covered layer. After the relaxation at a low temperature for the structural stabilization, an annealing temperature is set for the sample. Calculation parameters are the annealing temperature, the thickness of the covered layer, the width, the height and the strain of the wire. It was shown that defect generations are suppressed when the annealing temperature is lower, the dimension of the wire is larger and the compressive strain is larger. These results coincide with the tendency of the real experiments.
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© 2008 The Materials Research Society of Japan
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