IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on VLSI Design and CAD Algorithms
A High Efficiency Hybrid Step-Up/Step-Down DC-DC Converter Using Digital Dither for Smooth Transition
Yanzhao MAHongyi WANGGuican CHEN
著者情報
ジャーナル 認証あり

2011 年 E94.A 巻 12 号 p. 2685-2692

詳細
抄録
This paper presents a step-up/step-down DC-DC converter using a digital dither technique to achieve high efficiency and small output voltage ripple for portable electronic devices. The proposed control method minimizes not only the switching loss by operating like a pure buck or boost converter, but also the conduction loss by reducing the average inductor current even when four switches are used. Digital dither control is introduced to implement a buffer region for smooth transition between buck and boost modes. A minimum ripple dither with higher fundamental frequency is adopted to decrease the output voltage ripple. A window delay-line analog to digital converter (ADC) with delay calibration is achieved to digitalize the control voltage. The step-up/step-down DC-DC converter has been designed with a standard 0.5µm CMOS process. The output voltage is regulated within the input voltage ranged from 2.5V to 5.5V, and the output voltage ripple is reduced to less than 25mV during the mode transition. The peak power efficiency is 96%, and the maximum load current can reach 800mA.
著者関連情報
© 2011 The Institute of Electronics, Information and Communication Engineers
前の記事 次の記事
feedback
Top