Performance Improvement of Multi-Stage Threshold Decoding with Difference Register

抄録

This paper presents an improved version of multi-stage threshold decoding with a difference register (MTD-DR) for self-orthogonal convolutional codes (SOCCs). An approximate lower bound on the bit error rate (BER) with the maximum likelihood (ML) decoding is also given. MTD-DR is shown to achieve an approximate lower bound of ML decoding performance at the higher E_b/N₀. The code with larger minimum Hamming distance reduces the BER in error floor, but the BER in waterfall shifts to the higher E_b/N₀. This paper gives a decoding scheme that improves the BER in both directions, waterfall and error floor. In the waterfall region, a 2-step decoding (2SD) improves the coding gain of 0.40dB for shorter codes (code length 4200) and of 0.55dB for longer codes (code length 80000) compared to the conventional MTD-DR. The 2-step decoding that serially concatenates the parity check (PC) decoding improves the BER in the error floor region. This paper gives an effective use of PC decoding, that further makes the BER 1/8 times compared to the ordinary use of PC decoding in the error floor region. Therefore, the 2SD with effective use of parity check decoding improves the BER in the waterfall and the error floor regions simultaneously.