An Analysis of Local BTI Variation with Ring-Oscillator in Advanced Processes and Its Impact on Logic Circuit and SRAM

抄録

In this paper, we present an analysis of local variability of bias temperature instability (BTI) by measuring Ring-Oscillators (RO) on various processes and its impact on logic circuit and SRAM. The evaluation results based on measuring ROs of a test elementary group (TEG) fabricated in 7 nm Fin Field Effect Transistor (FinFET) process, 16/14 nm generation FinFET processes and a 28 nm planer process show that the standard deviations of Negative BTI (NBTI) V_th degradation (σ(ΔV_thp)) are proportional to the square root of the mean value (μ(ΔV_thp)) at any stress time, V_th flavors and various recovery conditions. While the amount of local BTI variation depends on the gate length, width and number of fins, the amount of local BTI variation at the 7 nm FinFET process is slightly larger than other processes. Based on these measurement results, we present an analysis result of its impact on logic circuit considering measured V_th dependency on global NBTI in the 7 nm FinFET process. We also analyse its impact on SRAM minimum operation voltage (V_min) of static noise margin (SNM) based on sensitivity analysis and shows non-negligible V_min degradation caused by local NBTI.