1994 年 18 巻 68 号 p. 7-12
In this paper, an architecture of imagers which execute motion estimation on the focal plane is proposed. Since the motion estimation needs quite heavy processing, the proposed parallel architecture can effectively reduce the total processing time and circuit complexity. A kind of single pixel matching is employed in this algorithm. Validity of this algorithm is confirmed by simulations. We also propose one of its component circuits: MOS resistor with segmentation switch.