IEEJ Transactions on Industry Applications
Online ISSN : 1348-8163
Print ISSN : 0913-6339
ISSN-L : 0913-6339
Special Issue Paper
A Basic Study on Defect Inspection Method for ASIC Manufacturing Line
(Third Report: A Proposal of Inspection Methodology Based on Chip Cost)
Koichi SakuraiSusumu FujiiToshiya Kaihara
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2004 Volume 124 Issue 1 Pages 15-23

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Abstract
The influence of strict defect control is both the enhancement of manufacturing yield and the delivery delay due to the drop of the machine operation rate. Therefore defect inspection method must be optimized especially for ASIC manufacturing. In the second report, we formularized the inspection parameter dependence on manufacturing yield and machine cleaning cycle that may affect delivery time. In this report, we propose new cost model which can take account of manufacturing yield drop, delivery delay cost etc. The delivery delay cost is based on queuing theory. In the last section of this report, we propose inspection parameter setting methodology to minimize chip cost.
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© 2004 by the Institute of Electrical Engineers of Japan
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