The channel mobility in the SiC MOSFET degrades on the rough surface of the p-well formed by ion implantation. Recently, we have developed a double-epitaxial MOSFET (DEMOSFET), in which the p-well comprises stacked two epitaxially grown p-type layers and n-type region between the p-wells is formed by ion implantation. This device exhibited a low on-resistance of 8.5mΩcm2 with a blocking voltage of 600V. In this study, to further improve the performance, we newly developed a device structure named implantation and epitaxial MOSFET (IEMOSFET). In this device, the p-well is formed by selective high-concentration p+ implantation and following low-concentration p-epitaxial growth. Fabricated IEMOSFET with a buried channel exhibited superior characteristics than DEMOSFET. The extremely low specific on-resistance of 4.3mΩcm2 was achieved with a blocking voltage of 1100V.
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