Evaluation of Special Instruction Implementations in Soft Processors for High-level Synthesis

Abstract

It is important to protect the intellectual property (IP) of embedded software, which contains precious know-hows and trade secrets. As hardware is more difficult to analyze than software, it is possible to protect IP by implementing it in hardware. It is particularly easy to port software to hardware when both the software and hardware are written in the same language. Some recent soft processors have been written in a high-level programming language (e.g., C), which can be synthesized by high-level synthesis (HLS) tools. Sakamoto et al. (2018) implemented a function of a software as a special instruction of a MIPS-based soft processor. They also pointed out that passing arguments and values involves various problems. Iwamoto et al. (2019) and Masanobu et al. (2020) enhanced Sakamoto's method; however, their evaluation results were imperfect and problematic. This study resolves many of these problems and reports more evaluation results than previous works. Detailed evaluation results suggest that the hardware implementation of a function is possible and that the overhead in latency and hardware cost is modest.