IEEJ Transactions on Industry Applications
Online ISSN : 1348-8163
Print ISSN : 0913-6339
ISSN-L : 0913-6339
Special Issue Paper
Reduction of dV/dt at Zero-Cross Switching of Half-Bridge Circuit in Synchronous Rectifier Operation
Takenori YasuzumiYasuyuki FujiwaraShugo Suzuki
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2025 Volume 145 Issue 6 Pages 402-408

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Abstract

This paper proposes a spike noise reduction method for a half-bridge circuit in synchronous rectification during zero-cross switching. A sharp dV/dt is caused by the switching operation of the superjunction-MOSFET (metal-oxide semiconductor field effect transistor) loaded into the half-bridge circuit. Inductive load switching with the device model, which is developed using BSIM3 with voltage-dependent capacitors, is simulated. The mechanism of the sharp dV/dt generated during switching transient in deadtime is discussed. The pre-charge circuit with a low-voltage MOSFET, a SBD (Schottky barrier diode), and an auxiliary power supply is added between the drain-source terminal. Drain-source capacitance is decreased as a function of the pre-charge voltage. The simulated results show that the 30V pre-charge effect reduces dV/dt from 23.4V/ns to 8.9V/ns. The half-bridge circuit with the pre-charge circuit was prototyped, and the results of the switching waveforms and dV/dt showed good agreements with the simulated results.

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© 2025 by the Institute of Electrical Engineers of Japan
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