Reducing DC-Link Current Harmonics in Dual-Inverter Fed Induction Motor with Lower-Voltage Rating Inverter

Abstract

This letter proposes a control method to reduce the high-order harmonics caused by pulse-width modulation (PWM) in the DC-link current in a dual inverter with a floating capacitor topology, which has the same voltage ratings in two inverters. The proposed control method reduces the high-order harmonic current through a six-step operation at the primary inverter. The secondary inverter supplies a sinusoidal voltage to the motor using a low-rated voltage. The validity of the proposed control method is confirmed through an experiment using an open-end winding induction motor. Furthermore, the floating capacitor voltage dependencies of the input current harmonics are analyzed.