抄録
We have developed a low delay video coding technique for use in digital broadcasting of HDTV format pictures. We developed a delay model that analyzes processing time of requisites for video codec. This delay model explicates a general codec delay from encoding-top to decoding-end in 600.8ms and mainly depends on preprocessing and sending and receiving buffers. Based on this model, we develop a technique that reduces the delay of 600.8 to 250ms. We tested our technique using a hardware encoder that operated on a FPGA platform at an operating frequency of 135MHz. This encoder showed a delay of 252ms using a consumer set top box as a decoder.
