Abstract
We studied a MOSFET which suits with a readout transistor on a solid-state imager in which MOS scanner is combined with an avalanche photoconversion layer. The MOSFET requires high endurance voltage because high voltage is applied between the scanner and the photoconversion layer to get high multiplication gain using avalanche phenomenon. In this paper, a new MOSFET structure, which can increase the endurance voltage by attaching an electric field relaxation layer to the drain contact of the MOSFET, is described. The device parameters for fine readout operation were decided by calculations using a process-device simulator. The electric field relaxation layer was confirmed to work effectively because endurance voltage of 60V was obtained on fabricated test devices.
