抄録
Higher performance and more sophisticated functions have been required in the digital still camera market growing at the rapid rate. On the other hand, the cost of hardware has been increasing to meet these requirements. In light of this situation, a new image processing technique is presented to achieve the digital still cameras with the higher performance at lower cost. The present technique focuses on the real time sequence capturing of single CCD images using the fixed block truncation coding (FBTC). FBTC is an embedded compression scheme we proposed to handle the image data with high quality in the hardcopy peripherals. In the digital still camera using the present technique, the sequence capturing rate is up to 30 frames per second for Video Graphic Array (VGA) size (640×480) full color image. Comparing with conventional technique, FBTC coding scheme can reduce the memory size for capturing the raw image from CCD to less than a half, and enable to transfer capturing image at twice rate.
