The Journal of Japan Institute for Interconnecting and Packaging Electronic Circuits
Online ISSN : 1884-1201
Print ISSN : 1341-0571
ISSN-L : 1341-0571
CAE System for Power Save Design of Digital Systems
Hideo ARAKIToshiro KUTSUWAKen-ichi KOBORIKatsuhiko EBATA
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JOURNAL FREE ACCESS

1995 Volume 10 Issue 1 Pages 49-56

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Abstract
Power saving of digital systems as the laptop computers by using butteries should be considered for carrying and long time operation. Hence, power saving semiconductor devices have been developed for this purpose. On the other hand, power save managements have to be considered by power control of the circuits. But, it has not been performed effectively because users are required to have very high knowledges to perform it. Then in this paper, we develop a CAE system for the power save design of digital systems. It is effective to simulate the power saving digital systems and it gives useful directions for the electronic circuits and PWB designs.
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© The Japan Institute of Electronics Packaging
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