抄録
The warpage mechanism of a thin embedded LSI package with a thick Cu plate was investigated for various Cu plate thicknesses. The package warpage increased gradually as the Cu plate was made thinner. Even structures with a balanced Cu and resin layer configuration for the top and bottom portions of the embedded chip showed substantial warpage, especially in the chip region, that was greater than that for an unbalanced layer configuration. This indicates the existence of other warpage factors as well as unbalanced residual stress between the top and bottom of the chip. A `Birth & Death' finite element method simulation showed that the thermal residual stresses induced by the coefficient of thermal expansion mismatch for the LSI chip and embedding resin were concentrated in the resin surrounding the lateral sides of the chip and that the stresses increased with decreasing Cu thickness. The release of these tensile stresses resulted in package warpage.
