Peripheral Flip Chip Interconnection on Au Plated Pads using Solder-Capped Cu Pillar Bumps

抄録

Peripheral flip chip interconnection on gold plated pads would be required to assemble the chip with surface mount technology (SMT) because the gold pads are sometimes used for SMT. Chip Connection (C2) which uses solder-capped copper pillar bumps on the chip and uses reflow process is an attractive method for ultra fine pitch peripheral flip chip interconnection. 50 μm-pitch interconnection on gold plated pads was made with C2 and the shape of the solder joints was discussed. It was found from a mechanical analysis that the stress in low-k layer would be reduced when the solder did not wet on the sides of copper pillars on the chip. Direct immersion gold (DIG) surface treatment would be attractive for not only compatibility to assemble with surface mount components but also for chip-package interaction improvement.