Transactions of The Japan Institute of Electronics Packaging
Online ISSN : 1884-8028
Print ISSN : 1883-3365
ISSN-L : 1883-3365
Technical Papers
Packaging Material Evaluation for 2.5D/3D TSV Application
Kazuyuki MitsukuraTatsuya MakinoKeiichi HatakeyamaKenneth June RebibisTeng WangGiovanni CapuzFabrice DuvalMikael DetalleAndy MillerEric Beyne
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2016 Volume 9 Pages E16-011-1-E16-011-7

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Abstract
Packaging material is one of the key components for through-silicon via (TSV) 2.5D/3D package giving a strong impact on the higher density integration and its reliability. In this paper, we report the assembly and reliability evaluation on film type underfill, photosensitive dielectric for redistribution layer as well as stress buffer, and molding compound. In the case of using our film type underfill, the chip is cracked by overflowed underfill during multi-die assembly in the conventional sequential method. By the collective staking method, the five-chip stacked package with TSV and 20 μm pitch bumps was demonstrated with excellent electrical yield. Also photosensitive dielectric realizes redistribution layers with 3 μm resolution and the raman shift in the 3D stack with photosensitive dielectric indicated lower stress than the one with silicon nitride as passivation layer. Finally we integrated our film type underfill, dielectric and molding compound in the stacked package, passing reliability tests such as thermal cycling and pressure cooker test.
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© 2016 The Japan Institute of Electronics Packaging
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