Proceedings of thermal engineering conference
Online ISSN : 2433-1317
2001
Session ID : OS-5I/B116
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B116 Enhanced Boiling of FC-72 on Silicon Chips with Submicron-Scale Roughness
Jinjia WEIHiroshi HONDAHiroshi TAKAMATSU
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CONFERENCE PROCEEDINGS FREE ACCESS

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Abstract
Experiments were conducted to study the effect of submicron-scale roughness on the pool boiling of FC-72 on 10×10 mm^2 silicon chips with and without rectangular micro-pin-fins of 50×50×60μm^3. The surface roughness was produced on a smooth silicon chip by : (1) chemical vapor deposition (CVD) of SiO_2, and (2) combination of sputtering of SiO_2 and wet etching of the SiO_2 film. The latter technique was also applied to a silicon chip with micro-pin-fins. While the two kinds of roughness showed different heat transfer characteristics in the nucleate boiling region, the critical heat flux q_<CHF> was fairly close to each other. The value of q_<CHF> was 1.3 to 1.5 times as large as that for a smooth chip. The highest value of q_<CHF> (1.8 to 2.3 times as large as the smooth chip value) was obtained by a chip with etched roughness on the micro-pin-finned surface.
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© 2001 The Japan Society of Mechanical Engineers
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