抄録
Coordinate rotation digital computer (CORDIC) is an efficient algorithm for calculating various complex mathematical functions and has been widely used to accelerate embedded processors. The conventional CORDIC hardware cannot achieve high flexibility and high calculation precision simultaneously. This paper presents a programmable architecture of the CORDIC algorithm to calculate various complex mathematical functions with high flexibility, high calculation precision, and reasonable processing speed. The proposed programmable architecture of CORDIC employs an interpreter and a programmable CORDIC iterator. These approaches can dynamically self-regulate the hardware function for calculating 15 different mathematical functions without any hardware modification. The implemented results prove that the proposed architecture is suitable for accelerating an embedded processor.
