前工程とパッケージング工程をハーフインチサイズで統一した製造システム

抄録

We have proposed a brand new model for semiconductor manufacturing system seamlessly integrating a wafer process-line with a packaging line. In the model, the following four features are introduced: a wafer package for a half-inch (ϕ 12.5 mm) wafer size, a mutual machine-size of 30 cm-width for every process, a clean-localized system for the whole manufacturing processes and, a flexible system that is responsible for a need of chip packaging started from one chip. To implement the model proposed, we have been developing a half-inch wafer packaging with a BGA (Ball Grid Array)-type solder array which consists of following processes: a compression molding, a laser via, a copper redistribution layer (RDL) patterning, a solder-ball mounting, and a reflow. All the newly developed machines for the processes above are employed to demonstrate a half-inch wafer in package. Some issues on patterning Cu electrical connection on top of the epoxy mold is focused and discussed in this work.