Influence of wafer edge profile on performance of Shallow Trench Isolation Chemical Mechanical Polishing (STI-CMP) process for semiconductor manufacturing was investigated. Finite Element Method was used to calculate the contact pressure on the wafer surface, and the removal rate was estimated based on the calculated contact pressure. As a result, shortening the edge width was confirmed to achieve flatter distribution of the contact pressure near the wafer edge. And wafer edge profile controlling is proposed as an effective approach to satisfy the requirement of the edge exclusion. Suitable Roll-Off Amount (ROA) and edge width are also forecasted for STI-CMP process in the next generation semiconductor manufacturing. To meet the specification for the generation of hp=35nm with 1.5mm edge exclusion, the edge width would be below 300μm and ROA would be bellow 100nm.
