2002 Volume 43 Issue 7 Pages 1599-1604
Copper sputtering method for fabrication of high performance logic LSI was studied. Extension of target to substrate distance is effective to improve step coverage of sputtered film combined with reduced operation pressure. Step coverage of low pressure long throw sputtering method also strongly depends upon the feature size of trenches and holes which are formed on silicon wafer. Sub-micron holes and trenches are successfully filled with copper by using this sputtering process followed by re-flow annealing process. Hydrogen annealing process prior to the sputtering deposition on via openings is also investigated to realize good conductivity through the via. This process results in the reduction of copper oxide at the surface of copper film. Using these newly developed processes, 0.2 \\micron node BiCMOS LSI with 4 level copper interconnects was successfully fabricated and high performance of the copper interconnect system was clearly demonstrated.
